Although significant advances in printed circuit board materials and design have enhanced the ability to meet the needs of high performance electronic systems, performance limitations become increasingly difficult to address at digital system speeds at multiple gigahertz (see, e.g., Mallik et al., Intel Tech J, 2005 9, 4, 259-271; and Johnson, “High Speed Digital Design,” Prentice Hall, 2001). An approach to overcome performance limitations of printed circuit board architectures is to physically separate the high-speed signals from lower speed signals and power and ground connections. High-speed signal sources such as microprocessors can be interconnected with controlled impedance circuit elements that can be fabricated separately from the printed circuit board and high-speed devices can be independently interconnected through a high-speed transmission line that is independent of the lower speed signals.
Interconnection overlays for electrically connecting high-speed signals between integrated circuit packages and lower speed signals through traces or other conductive structures on a printed circuit board have been proposed (see, e.g., Fjelstad et al., U.S. Application Publication Nos. 2003/0222282 and 2006/0091507). High-speed signals can be routed from on integrated circuit package to another integrated circuit package via a high-speed structure such as a cable, which can be non-separably connected to the packages, or separably interconnected to the integrated circuit packages via an edge connector. Edge connector technology can compromise electrical performance, particularly in high performance systems.
While a high speed transmission line interconnecting high speed devices or modules incorporating high speed devices can be non-separably connected to create a complex overlay that must then be assembled to the substrate carrying lower speed signals, a high speed bus incorporating separable interconnects can afford several advantages. An independent high-speed network formed with separable interconnects can facilitate, for example, assembly, upgrade, field repair, maintenance, and testing. For example, individual high speed devices or modules can be separately tested, inserted into separable sockets incorporating a high speed transmission line, and independently removed and replaced as necessary. Separable high performance interconnection technologies such as certain anisotropically conductive elastomer (ACE) interconnection technologies enable separable interconnection of multiple GHz electronic signals. Furthermore, ACE interconnection technology is amenable to effecting high-performance interconnection to fine-pitch land-grid, or pad-grid array electronic devices.
Accordingly, in a first aspect, electronic interconnect assemblies are provided comprising a first microelectronic assembly, a network interface comprising a transmission line electrically interconnected to a platform, a separable interconnect electrically interconnecting the first microelectronic assembly to the platform and to the transmission line, and a second microelectronic assembly electrically interconnected to the network interface and to the first microelectronic assembly.
In a second aspect, electronic systems are provided comprising a first, a second, and a third microelectronic assembly, a network interface comprising a first platform, a second platform, and a transmission line, wherein the first and second platforms are electrically interconnected to the transmission line, a separable interconnect electrically interconnecting the first microelectronic assembly to the transmission line and to the first platform, and a separable interconnect electrically interconnecting the second microelectronic assembly to the transmission line and to the second platform, wherein the first platform and the second platform are electrically interconnected to the third microelectronic assembly.
These and other features of the present disclosure are set forth herein.